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3421. Very Large Scale Integrated (VLSI) Design and Simulation

4.00 credits

Prerequisites: CSE 2300W or 2301; ECE 3201; open only to students in the School of Engineering.

Grading Basis: Graded

Design of MOS transistors, including short channel effects in sub-micron devices; scaling laws; design rules. Layout of NMOS and CMOS logic gates; power-delay calculations. Design of static and/or dynamic memories. Laboratory emphasizes schematic capture, simulation, timing analysis and testing; layout of custom IC's; use of VHDL.

Last Refreshed: 28-NOV-23 AM
To view current class enrollment click the refresh icon next to the enrollment numbers.
Term Campus Instruction Mode Instructor Section Session Schedule Location Enrollment Notes
Spring 2024 Storrs In Person Wang, Lei 001 Reg MoWe 12:20pm‑1:10pm
SHH 104 32/30
Spring 2024 Storrs In Person Wang, Lei 001L Reg We 2:30pm‑4:30pm
E2 307 16/15
Spring 2024 Storrs In Person Wang, Lei 002L Reg We 4:45pm‑6:45pm
E2 307 16/15